The invention relates to a circuit having a push-pull output stagexe2x80x94acting as amplifier stage for digital signalsxe2x80x94having in each case two n-channel MOS transistors operating as source followers and p-channel MOS transistors likewise operating as source followers.
Push-pull output stages of the type mentioned above are known in the prior art. They generally have the disadvantage that the fluctuation range of the levels of amplified digital signals, on account of temperature fluctuations, voltage fluctuations of the supply current source and also individual manufacturing tolerances of the individual electronic components, is so high that the output signals of these circuits cannot be used as input signals for diverse other circuits. The application possibilities of the conventional amplifier circuits are thus limited in practice.
It is accordingly an object of the invention to provide a push-pull end stage for digital signals with regulated output levels, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which assures that the levels of the output signals lie within a limited or regulatable and in this respect fixedly predeterminable fluctuation range. In other words, it is an object to provide an amplification circuit for digital signals wherein the tolerance of the levels of the output levels (high for a high level and low for a low level) is kept as small as possible.
With the foregoing and other objects in view there is provided, in accordance with the invention, a circuit with a push-pull output stage acting as an amplifier stage for digital signals, comprising:
two n-channel MOS transistors operating as source followers and each having a gate terminal;
two p-channel MOS transistors operating as source followers and each having a gate terminal;
operational amplifiers driving the gate terminals of the respective n-channel MOS transistors and p-channel MOS transistors via drivers;
a first of the operational amplifiers having a non-inverting input carrying a voltage defining a desired value of a high level of an output of the push-pull output stage, a second of the operational amplifiers having an inverting input carrying a voltage defining a desired value of a low level of the output of the push-pull output stage; and
a feedback interacting with the operational amplifiers for regulating respective high levels and low levels of gate voltages of the n-channel MOS transistors and the p-channel MOS transistors to a substantially constant value independently of an operating state of the push-pull output stage.
In other words, the objects of the invention are achieved in that the gate terminals of the n-channel MOS transistors and p-channel MOS transistors are in each case drive n by an operational amplifier via drivers, a voltage which defines the desired value of the high level of the output of the push-pull output stage being present at the noninverting input of one of the operational amplifiers, and a voltage which defines the desired value of the low level of the output of the push-pull output stage being present at the inverting input of the other of the operational amplifiers, and the operational amplifiers interacting with feedback means in such a way that the high levels or low levels of the gate voltages of the n-channel and p-channel transistors are regulated to an essentially constant value independently of the operating state of the push-pull output stage.
The circuit according to the invention has the effect that predeterminable voltages regulated to an essentially constant value are present at the gate terminals of the transistors of the output stage, so that the levels of the output signals also lie within a regulatable and fixedly predeterminable fluctuation range.
In this case, the respective operational amplifiers preferably interact with a network circuit having a high level node, which is connected for feedback to the inverting input of one operational amplifier, and a low level node, which is connected for feedback to the noninverting input of the other differential amplifier. The network circuit is preferably a mirror circuit with respect to the output stage, having an n-channel MOS transistor, a p-channel MOS transistor and a resistor arranged in between, the high level node and the low level node being present at the two terminals of the resistor.
In accordance with an added feature of the invention, the transistors of the mirror circuit have the same size as the n-channel transistors and p-channel transistors of the push-pull output stage and the resistor of the mirror circuit is equal to the load resistance of the push-pull output stage. There is thus complete symmetry with respect to the output stage.
However, it likewise lies within the scope of the invention for the transistors of the mirror circuit to differ by a factor 1/n from the n-channel transistors and p-channel transistors of the push-pull output stage, the resistor of the mirror circuit then differing by the factor n from the load resistance of the push-pull output stage, so that overall there is no change in the properties of the mirror circuit. In this case, n is preferably a natural number. The advantage of this variant is that, given smaller transistors and a correspondingly larger resistor, the current consumption of the mirror circuit is reduced.
In the case of a mirror circuit symmetrical with respect to the output stage, the high level of the output of the push-pull output stage is equal to the voltage present at the noninverting input of one of the operational amplifiers, and the low level of the output of the push-pull output stage is equal to the voltage present at the inverting input of the other of the operational amplifiers. The reference voltages at the operational amplifiers thus form the desired value for the high level and the low level of the output voltage of the push-pull output stage.
Two drivers are connected upstream of the push-pull output stage and switch the transistors of the push-pull output stage on and off. The driver stages serve for providing the correspondingly required levels VGHigh and VGLow for the gate voltages in order that the output stage generates the correct output levels. The output levels Q, Qn depend only on the levels VGHigh and VGLow.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a push-pull output stage for digital signals with regulated output levels, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.